The memory included with computer systems typically includes a memory cache which comprises buffer storage that contains instructions and data frequently accessed by the processor in the system. Caches are typically constructed of cache lines which are boundaries between blocks of storage that map to a specific area in the cache. The cache lines are usually made up of a plurality of words having adjacent addresses.
Computer systems which include memory caches often support the software concept of memory stacks. Stacks represent areas in memory which store temporary register information and return addresses of subroutines. Most high level programming languages make use of stacks to support a variety of programming constructs.
Also referred to as pushdown storage, stacks permit normal read and write operations and also POP read and PUSH write operations. The operation of the stack in POP and PUSH operations is a last-in-first-out type of operation, that is, the last word written (PUSHED) into the stack is the first word retrieved (POPPED) from the stack. Register-based computer systems do not directly support stacks in the processor hardware and thus stacks must be implemented in such systems in memory. Because of this architectural limitation, performance is adversely affected when executing code which includes stack operations, especially in systems which include cacheable memory. The impact of stack operations on system performance is most obvious in systems built around IBM.RTM. 386 SLC processors or Intel.RTM. X86 processors both of which include a processor cache.
Read allocate and write allocate procedures are permitted with the memory concept of stacks. A read allocate procedure is triggered when the processor attempts to read data from the cache and the target data is not in the cache. This is referred to as a cache read miss case. In such a case, the processor retrieves the data directly from memory and copies it into the cache line in case it is needed again. A write allocate procedure occurs when the processor attempts to write to an address which is not in the cache (a cache write miss). In this case, the processor writes the data all the way to main memory and then loads the line of data into the cache from main memory in case it is needed again.
Read allocate and write allocate procedures, however, adversely affect system performance in systems which include caches and which permit POP read and PUSH write operations. For example, if the last word in a cache line is to be POPPED from the line, updating the cache line in the cache read miss case is unnecessary. Once the last word corresponding to a particular cache line has been read from main memory and passed to the processor, there is no need to copy it to the cache line because, being the last word to be POPPED in the cache line, the cache line is necessarily invalid.
Similarly, in the PUSH write case, if an address corresponding to the last word in a cache line is to be written to, updating the cache line from memory in the case of a cache write miss is again unnecessary. There is no need to load the entire cache line of data into the cache from main memory.
Read allocate and write allocate procedures, however, remain useful in systems having cacheable memory and supporting stack operations. It is an object of the present invention, therefore, to provide a stack cache logic mechanism which determines the times when read allocate and write allocate procedures should be implemented in stack operations to the cache in order to improve system performance, without adversely affecting non-stack memory and cache operations.